Design Verification Engineer (San Francisco) Job at Quix Recruitment Group Ltd, San Francisco, CA

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  • Quix Recruitment Group Ltd
  • San Francisco, CA

Job Description

Our client is a world-leading technology company at the forefront of semiconductor innovation, powering some of the most advanced digital systems in the industry. Their work touches billions of users globally, driving nextgeneration performance and efficiency across highly complex hardware and software ecosystems.

They are seeking a Design Verification Engineer with deep expertise in SystemVerilog/UVM and digital ASIC verification. This role is critical for ensuring robust, reusable verification environments, achieving high functional coverage, and supporting rapid innovation in complex hardware designs that operate at massive scale.

What Youll Do

  • Develop comprehensive Core Verification Plans based on unit microarchitecture and design specifications.
  • Architect and implement reusable verification environments using SystemVerilog/UVM.
  • Create and execute constrainedrandom and directed tests to achieve high functional and code coverage for core units.
  • Analyze simulation results, debug complex failures, and collaborate with design teams to rootcause and resolve issues.
  • Develop and maintain scripts (Python/Perl) to automate verification flows and regression management.
  • Support verification of digital systems using standard IP components and interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
  • Act as a technical leader within verification teams, providing feedback to RTL designers and IP architects.

Requirements

  • SystemVerilog/UVM expertise is mandatory.
  • At least 7 years of handson expertise.
  • Strong grasp of digital logic design and verification methodologies.
  • Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
  • Proven ability to work autonomously and demonstrate technical confidence when engaging with, and providing constructive feedback to, FE RTL design teams and CPU/IP microarchitects.
  • Proficiency with industrystandard EDA simulation and debug tools.
  • Solid abilities in debugging and rootcause analysis.
  • Experience with scripting (Python, Perl).
  • Excellent written and verbal communication skills in English are required.

NicetoHave Qualifications (Not required, but beneficial)

  • Experience in highperformance computing or largescale SoC verification.
  • Familiarity with emerging verification methodologies and flows.
  • Prior involvement in multiteam or crosssite verification projects.

Why This Role Matters

This position is central to delivering highperformance, reliable digital hardware at global scale. You will have the opportunity to shape verification strategies, implement reusable test environments, and contribute to cuttingedge projects that power complex systems used by millions worldwide. This is an environment where technical expertise meets massive realworld impact.

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Job Tags

Full time, Worldwide,

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